{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1475006852663 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.0.0 Build 211 04/27/2016 SJ Lite Edition " "Version 16.0.0 Build 211 04/27/2016 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1475006852670 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Sep 27 22:07:31 2016 " "Processing started: Tue Sep 27 22:07:31 2016" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1475006852670 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006852670 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta NIOS_LED -c NIOS_LED " "Command: quartus_sta NIOS_LED -c NIOS_LED" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006852670 ""}
{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1475006853071 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853472 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853472 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853549 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853549 ""}
{ "Info" "ISTA_SDC_STATEMENT_PARENT" "" "Evaluating HDL-embedded SDC commands" { { "Info" "ISTA_SDC_STATEMENT_ENTITY" "altera_std_synchronizer " "Entity altera_std_synchronizer" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_false_path -to \[get_keepers \{*altera_std_synchronizer:*\|din_s1\}\] " "set_false_path -to \[get_keepers \{*altera_std_synchronizer:*\|din_s1\}\]" {  } {  } 0 332166 "%1!s!" 0 0 "Design Software" 0 -1 1475006853888 ""}  } {  } 0 332165 "Entity %1!s!" 0 0 "Design Software" 0 -1 1475006853888 ""} { "Info" "ISTA_SDC_STATEMENT_ENTITY" "sld_hub " "Entity sld_hub" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "create_clock -name altera_reserved_tck \[get_ports \{altera_reserved_tck\}\] -period 10MHz    " "create_clock -name altera_reserved_tck \[get_ports \{altera_reserved_tck\}\] -period 10MHz   " {  } {  } 0 332166 "%1!s!" 0 0 "Design Software" 0 -1 1475006853888 ""} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_clock_groups -asynchronous -group \{altera_reserved_tck\} " "set_clock_groups -asynchronous -group \{altera_reserved_tck\}" {  } {  } 0 332166 "%1!s!" 0 0 "Design Software" 0 -1 1475006853888 ""}  } {  } 0 332165 "Entity %1!s!" 0 0 "Design Software" 0 -1 1475006853888 ""}  } {  } 0 332164 "Evaluating HDL-embedded SDC commands" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853888 ""}
{ "Info" "ISTA_SDC_FOUND" "NIOS_LED/synthesis/submodules/altera_reset_controller.sdc " "Reading SDC File: 'NIOS_LED/synthesis/submodules/altera_reset_controller.sdc'" {  } {  } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853901 ""}
{ "Info" "ISTA_SDC_FOUND" "NIOS_LED/synthesis/submodules/NIOS_LED_nios2_gen2_0_cpu.sdc " "Reading SDC File: 'NIOS_LED/synthesis/submodules/NIOS_LED_nios2_gen2_0_cpu.sdc'" {  } {  } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853910 ""}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "clk_clk " "Node: clk_clk was determined to be a clock but was found without an associated clock assignment." { { "Info" "ISTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT_DETAILS" "Register NIOS_LED_nios2_gen2_0:nios2_gen2_0\|NIOS_LED_nios2_gen2_0_cpu:cpu\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug\|monitor_ready clk_clk " "Register NIOS_LED_nios2_gen2_0:nios2_gen2_0\|NIOS_LED_nios2_gen2_0_cpu:cpu\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug\|monitor_ready is being clocked by clk_clk" {  } {  } 0 13166 "%1!s! %2!s! is being clocked by %3!s!" 0 0 "Design Software" 0 -1 1475006853930 ""}  } {  } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853930 "|NIOS_LED|clk_clk"}
{ "Info" "ISTA_UNKNOWN_UNATE_EDGE_ASSUMED_POS" "" "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." { { "Info" "ISTA_CLOCK_MGR_INFO" "Cell: altera_internal_jtag  from: tck  to: tckutap " "Cell: altera_internal_jtag  from: tck  to: tckutap" {  } {  } 0 332098 "%1!s!" 0 0 "Design Software" 0 -1 1475006853932 ""}  } {  } 0 332097 "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853932 ""}
{ "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "altera_reserved_tck (Rise) altera_reserved_tck (Rise) setup and hold " "From altera_reserved_tck (Rise) to altera_reserved_tck (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Design Software" 0 -1 1475006853941 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "altera_reserved_tck (Rise) altera_reserved_tck (Fall) setup and hold " "From altera_reserved_tck (Rise) to altera_reserved_tck (Fall) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Design Software" 0 -1 1475006853941 ""}  } {  } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853941 ""}
{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1475006853942 ""}
{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1475006853958 ""}
{ "Info" "0" "" "Can't run Report Timing Closure Recommendations. The current device family is not supported." {  } {  } 0 0 "Can't run Report Timing Closure Recommendations. The current device family is not supported." 0 0 "TimeQuest Timing Analyzer" 0 0 1475006853965 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 45.014 " "Worst-case setup slack is 45.014" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853970 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853970 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   45.014               0.000 altera_reserved_tck  " "   45.014               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853970 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853970 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.360 " "Worst-case hold slack is 0.360" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853974 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853974 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.360               0.000 altera_reserved_tck  " "    0.360               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853974 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853974 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 96.786 " "Worst-case recovery slack is 96.786" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853978 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853978 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   96.786               0.000 altera_reserved_tck  " "   96.786               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853978 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853978 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 1.516 " "Worst-case removal slack is 1.516" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853981 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853981 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.516               0.000 altera_reserved_tck  " "    1.516               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853981 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853981 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 49.655 " "Worst-case minimum pulse width slack is 49.655" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853983 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853983 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.655               0.000 altera_reserved_tck  " "   49.655               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006853983 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006853983 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 3 synchronizer chains. " "Report Metastability: Found 3 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst-Case MTBF of Design is 1e+09 years or 3.15e+16 seconds. " "Worst-Case MTBF of Design is 1e+09 years or 3.15e+16 seconds." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds.\n " "Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds.\n" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 3 " "Number of Synchronizer Chains Found: 3" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 0.333 " "Fraction of Chains for which MTBFs Could Not be Calculated: 0.333" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 196.616 ns " "Worst Case Available Settling Time: 196.616 ns" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst-Case MTBF values are calculated based on the worst-case silicon characteristics, with worst-case operating conditions. " "Worst-Case MTBF values are calculated based on the worst-case silicon characteristics, with worst-case operating conditions." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "  - Under worst-case conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 1.5 " "  - Under worst-case conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 1.5" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. " "Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "  - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 3.7 " "  - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 3.7" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006854004 ""}  } {  } 0 332114 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006854004 ""}
{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1475006854034 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006854076 ""}
{ "Warning" "WTAPI_PRELIMINARY_TIMING" "10M08DAF256C8GES " "Timing characteristics of device 10M08DAF256C8GES are preliminary" {  } {  } 0 334000 "Timing characteristics of device %1!s! are preliminary" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006854077 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858535 ""}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "clk_clk " "Node: clk_clk was determined to be a clock but was found without an associated clock assignment." { { "Info" "ISTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT_DETAILS" "Register NIOS_LED_nios2_gen2_0:nios2_gen2_0\|NIOS_LED_nios2_gen2_0_cpu:cpu\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug\|monitor_ready clk_clk " "Register NIOS_LED_nios2_gen2_0:nios2_gen2_0\|NIOS_LED_nios2_gen2_0_cpu:cpu\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug\|monitor_ready is being clocked by clk_clk" {  } {  } 0 13166 "%1!s! %2!s! is being clocked by %3!s!" 0 0 "Design Software" 0 -1 1475006858771 ""}  } {  } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858771 "|NIOS_LED|clk_clk"}
{ "Info" "ISTA_UNKNOWN_UNATE_EDGE_ASSUMED_POS" "" "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." { { "Info" "ISTA_CLOCK_MGR_INFO" "Cell: altera_internal_jtag  from: tck  to: tckutap " "Cell: altera_internal_jtag  from: tck  to: tckutap" {  } {  } 0 332098 "%1!s!" 0 0 "Design Software" 0 -1 1475006858772 ""}  } {  } 0 332097 "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858772 ""}
{ "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "altera_reserved_tck (Rise) altera_reserved_tck (Rise) setup and hold " "From altera_reserved_tck (Rise) to altera_reserved_tck (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Design Software" 0 -1 1475006858775 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "altera_reserved_tck (Rise) altera_reserved_tck (Fall) setup and hold " "From altera_reserved_tck (Rise) to altera_reserved_tck (Fall) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Design Software" 0 -1 1475006858775 ""}  } {  } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858775 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 45.196 " "Worst-case setup slack is 45.196" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   45.196               0.000 altera_reserved_tck  " "   45.196               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858786 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858786 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.322 " "Worst-case hold slack is 0.322" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.322               0.000 altera_reserved_tck  " "    0.322               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858790 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858790 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 96.917 " "Worst-case recovery slack is 96.917" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858793 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858793 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   96.917               0.000 altera_reserved_tck  " "   96.917               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858793 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858793 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 1.365 " "Worst-case removal slack is 1.365" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858796 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858796 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.365               0.000 altera_reserved_tck  " "    1.365               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858796 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858796 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 49.678 " "Worst-case minimum pulse width slack is 49.678" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858799 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858799 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.678               0.000 altera_reserved_tck  " "   49.678               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006858799 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858799 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 3 synchronizer chains. " "Report Metastability: Found 3 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst-Case MTBF of Design is 1e+09 years or 3.15e+16 seconds. " "Worst-Case MTBF of Design is 1e+09 years or 3.15e+16 seconds." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds.\n " "Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds.\n" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 3 " "Number of Synchronizer Chains Found: 3" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 0.333 " "Fraction of Chains for which MTBFs Could Not be Calculated: 0.333" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 196.837 ns " "Worst Case Available Settling Time: 196.837 ns" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst-Case MTBF values are calculated based on the worst-case silicon characteristics, with worst-case operating conditions. " "Worst-Case MTBF values are calculated based on the worst-case silicon characteristics, with worst-case operating conditions." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "  - Under worst-case conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 1.5 " "  - Under worst-case conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 1.5" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. " "Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "  - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 3.7 " "  - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 3.7" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006858819 ""}  } {  } 0 332114 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006858819 ""}
{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1475006858825 ""}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "clk_clk " "Node: clk_clk was determined to be a clock but was found without an associated clock assignment." { { "Info" "ISTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT_DETAILS" "Register NIOS_LED_nios2_gen2_0:nios2_gen2_0\|NIOS_LED_nios2_gen2_0_cpu:cpu\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug\|monitor_ready clk_clk " "Register NIOS_LED_nios2_gen2_0:nios2_gen2_0\|NIOS_LED_nios2_gen2_0_cpu:cpu\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci\|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug:the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug\|monitor_ready is being clocked by clk_clk" {  } {  } 0 13166 "%1!s! %2!s! is being clocked by %3!s!" 0 0 "Design Software" 0 -1 1475006859091 ""}  } {  } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859091 "|NIOS_LED|clk_clk"}
{ "Info" "ISTA_UNKNOWN_UNATE_EDGE_ASSUMED_POS" "" "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." { { "Info" "ISTA_CLOCK_MGR_INFO" "Cell: altera_internal_jtag  from: tck  to: tckutap " "Cell: altera_internal_jtag  from: tck  to: tckutap" {  } {  } 0 332098 "%1!s!" 0 0 "Design Software" 0 -1 1475006859091 ""}  } {  } 0 332097 "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859091 ""}
{ "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "altera_reserved_tck (Rise) altera_reserved_tck (Rise) setup and hold " "From altera_reserved_tck (Rise) to altera_reserved_tck (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Design Software" 0 -1 1475006859094 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "altera_reserved_tck (Rise) altera_reserved_tck (Fall) setup and hold " "From altera_reserved_tck (Rise) to altera_reserved_tck (Fall) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Design Software" 0 -1 1475006859094 ""}  } {  } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859094 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 48.314 " "Worst-case setup slack is 48.314" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859103 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859103 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   48.314               0.000 altera_reserved_tck  " "   48.314               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859103 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859103 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.151 " "Worst-case hold slack is 0.151" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859107 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859107 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.151               0.000 altera_reserved_tck  " "    0.151               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859107 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859107 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 98.600 " "Worst-case recovery slack is 98.600" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859111 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859111 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   98.600               0.000 altera_reserved_tck  " "   98.600               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859111 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859111 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.609 " "Worst-case removal slack is 0.609" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859114 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859114 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.609               0.000 altera_reserved_tck  " "    0.609               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859114 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859114 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 49.421 " "Worst-case minimum pulse width slack is 49.421" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859116 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859116 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.421               0.000 altera_reserved_tck  " "   49.421               0.000 altera_reserved_tck " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1475006859116 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859116 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 3 synchronizer chains. " "Report Metastability: Found 3 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst-Case MTBF of Design is 1e+09 years or 3.15e+16 seconds. " "Worst-Case MTBF of Design is 1e+09 years or 3.15e+16 seconds." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds.\n " "Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds.\n" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 3 " "Number of Synchronizer Chains Found: 3" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 0.333 " "Fraction of Chains for which MTBFs Could Not be Calculated: 0.333" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 198.693 ns " "Worst Case Available Settling Time: 198.693 ns" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst-Case MTBF values are calculated based on the worst-case silicon characteristics, with worst-case operating conditions. " "Worst-Case MTBF values are calculated based on the worst-case silicon characteristics, with worst-case operating conditions." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "  - Under worst-case conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 1.5 " "  - Under worst-case conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 1.5" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. " "Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions." {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "  - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 3.7 " "  - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 3.7" {  } {  } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1475006859136 ""}  } {  } 0 332114 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006859136 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006860090 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006860091 ""}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 14 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 14 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "927 " "Peak virtual memory: 927 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1475006860194 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Sep 27 22:07:40 2016 " "Processing ended: Tue Sep 27 22:07:40 2016" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1475006860194 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1475006860194 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:10 " "Total CPU time (on all processors): 00:00:10" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1475006860194 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1475006860194 ""}
